edfxtp Delay flop with loopback enable, non-inverted clock, single output.

NAME

edfxtp from sky130_fd_sc_ms

DESCRIPTION

Delay flop with loopback enable, non-inverted clock, single output.

FUNCTION

VERILOG

"sky130_fd_sc_ms__edfxtp"

/*
*/


`ifndef SKY130_FD_SC_MS__EDFXTP_FUNCTIONAL_V
`define SKY130_FD_SC_MS__EDFXTP_FUNCTIONAL_V

/**

`timescale 1ns / 1ps
`default_nettype none

// Import user defined primitives.
`include "../../models/udp_mux_2to1/sky130_fd_sc_ms__udp_mux_2to1.v"
`include "../../models/udp_dff_p/sky130_fd_sc_ms__udp_dff_p.v"

`celldefine
module sky130_fd_sc_ms__edfxtp (
    Q  ,
    CLK,
    D  ,
    DE
);

    // Module ports
    output Q  ;
    input  CLK;
    input  D  ;
    input  DE ;

    // Local signals
    wire buf_Q  ;
    wire mux_out;

    //                            Delay       Name       Output   Other arguments
    sky130_fd_sc_ms__udp_mux_2to1             mux_2to10 (mux_out, buf_Q, D, DE   );
    sky130_fd_sc_ms__udp_dff$P    `UNIT_DELAY dff0      (buf_Q  , mux_out, CLK   );
    buf                                       buf0      (Q      , buf_Q          );

endmodule
`endcelldefine

`default_nettype wire
`endif  // SKY130_FD_SC_MS__EDFXTP_FUNCTIONAL_V

SPICE

LAYOUT

sky130_fd_sc_ms__edfxtp_1

not to scale



.subckt sky130_fd_sc_ms__edfxtp_1 CLK D DE VGND VNB VPB VPWR Q
X0 a_1997_74# a_533_61# VGND VNB sky130_fd_pr__nfet_01v8_lvt w=420000u l=150000u
X1 VPWR a_1156_90# a_1409_64# VPB sky130_fd_pr__pfet_01v8 w=840000u l=180000u
X2 VGND a_1409_64# a_1797_74# VNB sky130_fd_pr__nfet_01v8_lvt w=740000u l=150000u
X3 a_131_74# DE VGND VNB sky130_fd_pr__nfet_01v8_lvt w=420000u l=150000u
X4 a_1797_74# a_958_74# a_1895_74# VNB sky130_fd_pr__nfet_01v8_lvt w=740000u l=150000u
X5 a_1156_90# a_763_74# a_1385_508# VPB sky130_fd_pr__pfet_01v8 w=420000u l=180000u
X6 VGND a_763_74# a_958_74# VNB sky130_fd_pr__nfet_01v8_lvt w=740000u l=150000u
X7 VPWR a_1409_64# a_1797_392# VPB sky130_fd_pr__pfet_01v8 w=1e+06u l=180000u
X8 a_159_446# DE VGND VNB sky130_fd_pr__nfet_01v8_lvt w=420000u l=150000u
X9 a_1349_90# a_1409_64# VGND VNB sky130_fd_pr__nfet_01v8_lvt w=420000u l=150000u
X10 VGND CLK a_763_74# VNB sky130_fd_pr__nfet_01v8_lvt w=740000u l=150000u
X11 Q a_1895_74# VGND VNB sky130_fd_pr__nfet_01v8_lvt w=740000u l=150000u
X12 a_159_446# DE VPWR VPB sky130_fd_pr__pfet_01v8 w=640000u l=180000u
X13 a_27_508# a_763_74# a_1156_90# VNB sky130_fd_pr__nfet_01v8_lvt w=420000u l=150000u
X14 VGND a_159_446# a_491_87# VNB sky130_fd_pr__nfet_01v8_lvt w=420000u l=150000u
X15 a_1156_90# a_958_74# a_1349_90# VNB sky130_fd_pr__nfet_01v8_lvt w=420000u l=150000u
X16 VGND a_1895_74# a_533_61# VNB sky130_fd_pr__nfet_01v8_lvt w=420000u l=150000u
X17 VPWR DE a_557_436# VPB sky130_fd_pr__pfet_01v8 w=420000u l=180000u
X18 a_27_508# a_958_74# a_1156_90# VPB sky130_fd_pr__pfet_01v8 w=420000u l=180000u
X19 a_1895_74# a_763_74# a_1997_74# VNB sky130_fd_pr__nfet_01v8_lvt w=420000u l=150000u
X20 a_1385_508# a_1409_64# VPWR VPB sky130_fd_pr__pfet_01v8 w=420000u l=180000u
X21 a_117_508# a_159_446# VPWR VPB sky130_fd_pr__pfet_01v8 w=420000u l=180000u
X22 VGND a_1156_90# a_1409_64# VNB sky130_fd_pr__nfet_01v8_lvt w=640000u l=150000u
X23 a_557_436# a_533_61# a_27_508# VPB sky130_fd_pr__pfet_01v8 w=420000u l=180000u
X24 VPWR a_763_74# a_958_74# VPB sky130_fd_pr__pfet_01v8 w=1.12e+06u l=180000u
X25 a_27_508# D a_131_74# VNB sky130_fd_pr__nfet_01v8_lvt w=420000u l=150000u
X26 a_491_87# a_533_61# a_27_508# VNB sky130_fd_pr__nfet_01v8_lvt w=420000u l=150000u
X27 a_1895_74# a_958_74# a_2091_502# VPB sky130_fd_pr__pfet_01v8 w=420000u l=180000u
X28 a_27_508# D a_117_508# VPB sky130_fd_pr__pfet_01v8 w=420000u l=180000u
X29 a_1797_392# a_763_74# a_1895_74# VPB sky130_fd_pr__pfet_01v8 w=1e+06u l=180000u
X30 VPWR a_1895_74# a_533_61# VPB sky130_fd_pr__pfet_01v8 w=640000u l=180000u
X31 VPWR CLK a_763_74# VPB sky130_fd_pr__pfet_01v8 w=1.12e+06u l=180000u
X32 a_2091_502# a_533_61# VPWR VPB sky130_fd_pr__pfet_01v8 w=420000u l=180000u
X33 Q a_1895_74# VPWR VPB sky130_fd_pr__pfet_01v8 w=1.12e+06u l=180000u
.ends