NAME

and2b from sky130_fd_sc_ls

DESCRIPTION

2-input AND, first input inverted.

FUNCTION

VERILOG

"sky130_fd_sc_ls__and2b" 
/*
*/


`ifndef SKY130_FD_SC_LS__AND2B_FUNCTIONAL_V
`define SKY130_FD_SC_LS__AND2B_FUNCTIONAL_V

/**

`timescale 1ns / 1ps
`default_nettype none

`celldefine
module sky130_fd_sc_ls__and2b (
    X  ,
    A_N,
    B
);

    // Module ports
    output X  ;
    input  A_N;
    input  B  ;

    // Local signals
    wire not0_out  ;
    wire and0_out_X;

    //  Name  Output      Other arguments
    not not0 (not0_out  , A_N            );
    and and0 (and0_out_X, not0_out, B    );
    buf buf0 (X         , and0_out_X     );

endmodule
`endcelldefine

`default_nettype wire
`endif  // SKY130_FD_SC_LS__AND2B_FUNCTIONAL_V

SPICE

LAYOUT

sky130_fd_sc_ls__and2b_1

not to scale 



.subckt sky130_fd_sc_ls__and2b_1 A_N B VGND VNB VPB VPWR X
X0 a_266_98# a_27_74# a_353_98# VNB sky130_fd_pr__nfet_01v8 w=640000u l=150000u
X1 VPWR a_27_74# a_266_98# VPB sky130_fd_pr__pfet_01v8_hvt w=840000u l=150000u
X2 a_266_98# B VPWR VPB sky130_fd_pr__pfet_01v8_hvt w=840000u l=150000u
X3 a_353_98# B VGND VNB sky130_fd_pr__nfet_01v8 w=640000u l=150000u
X4 a_27_74# A_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt w=840000u l=150000u
X5 a_27_74# A_N VGND VNB sky130_fd_pr__nfet_01v8 w=550000u l=150000u
X6 VGND a_266_98# X VNB sky130_fd_pr__nfet_01v8 w=740000u l=150000u
X7 VPWR a_266_98# X VPB sky130_fd_pr__pfet_01v8_hvt w=1.12e+06u l=150000u
.ends

sky130_fd_sc_ls__and2b_2

not to scale 


.subckt sky130_fd_sc_ls__and2b_2 A_N B VGND VNB VPB VPWR X
X0 VPWR a_198_48# X VPB sky130_fd_pr__pfet_01v8_hvt w=1.12e+06u l=150000u
X1 VPWR B a_198_48# VPB sky130_fd_pr__pfet_01v8_hvt w=1e+06u l=150000u
X2 a_505_74# a_27_74# a_198_48# VNB sky130_fd_pr__nfet_01v8 w=740000u l=150000u
X3 VGND a_198_48# X VNB sky130_fd_pr__nfet_01v8 w=740000u l=150000u
X4 a_27_74# A_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt w=840000u l=150000u
X5 X a_198_48# VGND VNB sky130_fd_pr__nfet_01v8 w=740000u l=150000u
X6 X a_198_48# VPWR VPB sky130_fd_pr__pfet_01v8_hvt w=1.12e+06u l=150000u
X7 VGND B a_505_74# VNB sky130_fd_pr__nfet_01v8 w=740000u l=150000u
X8 a_27_74# A_N VGND VNB sky130_fd_pr__nfet_01v8 w=550000u l=150000u
X9 a_198_48# a_27_74# VPWR VPB sky130_fd_pr__pfet_01v8_hvt w=1e+06u l=150000u
.ends

sky130_fd_sc_ls__and2b_4

not to scale 


.subckt sky130_fd_sc_ls__and2b_4 A_N B VGND VNB VPB VPWR X
X0 X a_218_424# VPWR VPB sky130_fd_pr__pfet_01v8_hvt w=1.12e+06u l=150000u
X1 VPWR B a_218_424# VPB sky130_fd_pr__pfet_01v8_hvt w=840000u l=150000u
X2 VGND a_218_424# X VNB sky130_fd_pr__nfet_01v8 w=740000u l=150000u
X3 X a_218_424# VPWR VPB sky130_fd_pr__pfet_01v8_hvt w=1.12e+06u l=150000u
X4 VGND B a_233_74# VNB sky130_fd_pr__nfet_01v8 w=640000u l=150000u
X5 a_218_424# a_27_392# VPWR VPB sky130_fd_pr__pfet_01v8_hvt w=840000u l=150000u
X6 a_27_392# A_N VPWR VPB sky130_fd_pr__pfet_01v8_hvt w=1e+06u l=150000u
X7 a_233_74# B VGND VNB sky130_fd_pr__nfet_01v8 w=640000u l=150000u
X8 VGND a_218_424# X VNB sky130_fd_pr__nfet_01v8 w=740000u l=150000u
X9 a_218_424# B VPWR VPB sky130_fd_pr__pfet_01v8_hvt w=840000u l=150000u
X10 X a_218_424# VGND VNB sky130_fd_pr__nfet_01v8 w=740000u l=150000u
X11 X a_218_424# VGND VNB sky130_fd_pr__nfet_01v8 w=740000u l=150000u
X12 a_27_392# A_N VGND VNB sky130_fd_pr__nfet_01v8 w=640000u l=150000u
X13 VPWR a_218_424# X VPB sky130_fd_pr__pfet_01v8_hvt w=1.12e+06u l=150000u
X14 a_218_424# a_27_392# a_233_74# VNB sky130_fd_pr__nfet_01v8 w=640000u l=150000u
X15 VPWR a_218_424# X VPB sky130_fd_pr__pfet_01v8_hvt w=1.12e+06u l=150000u
X16 VPWR a_27_392# a_218_424# VPB sky130_fd_pr__pfet_01v8_hvt w=840000u l=150000u
X17 a_233_74# a_27_392# a_218_424# VNB sky130_fd_pr__nfet_01v8 w=640000u l=150000u
.ends