NAME

dfrtn from sky130_fd_sc_lp

DESCRIPTION

Delay flop, inverted reset, inverted clock, complementary outputs.

FUNCTION

VERILOG

"sky130_fd_sc_lp__dfrtn"
/*
*/


`ifndef SKY130_FD_SC_LP__DFRTN_FUNCTIONAL_V
`define SKY130_FD_SC_LP__DFRTN_FUNCTIONAL_V

/**

`timescale 1ns / 1ps
`default_nettype none

// Import user defined primitives.
`include "../../models/udp_dff_pr/sky130_fd_sc_lp__udp_dff_pr.v"

`celldefine
module sky130_fd_sc_lp__dfrtn (
    Q      ,
    CLK_N  ,
    D      ,
    RESET_B
);

    // Module ports
    output Q      ;
    input  CLK_N  ;
    input  D      ;
    input  RESET_B;

    // Local signals
    wire buf_Q ;
    wire RESET ;
    wire intclk;

    //                          Delay       Name  Output  Other arguments
    not                                     not0 (RESET , RESET_B         );
    not                                     not1 (intclk, CLK_N           );
    sky130_fd_sc_lp__udp_dff$PR `UNIT_DELAY dff0 (buf_Q , D, intclk, RESET);
    buf                                     buf0 (Q     , buf_Q           );

endmodule
`endcelldefine

`default_nettype wire
`endif  // SKY130_FD_SC_LP__DFRTN_FUNCTIONAL_V

SPICE

LAYOUT

sky130_fd_sc_lp__dfrtn_1

not to scale



.subckt sky130_fd_sc_lp__dfrtn_1 CLK_N D RESET_B VGND VNB VPB VPWR Q
X0 a_27_463# a_306_277# a_336_463# VPB sky130_fd_pr__pfet_01v8_hvt w=420000u l=150000u
X1 VPWR CLK_N a_306_277# VPB sky130_fd_pr__pfet_01v8_hvt w=640000u l=150000u
X2 a_294_35# a_306_277# VGND VNB sky130_fd_pr__nfet_01v8 w=420000u l=150000u
X3 a_336_463# a_294_35# a_447_463# VPB sky130_fd_pr__pfet_01v8_hvt w=420000u l=150000u
X4 VGND RESET_B a_142_121# VNB sky130_fd_pr__nfet_01v8 w=420000u l=150000u
X5 a_540_123# RESET_B VGND VNB sky130_fd_pr__nfet_01v8 w=420000u l=150000u
X6 VGND RESET_B a_1465_125# VNB sky130_fd_pr__nfet_01v8 w=420000u l=150000u
X7 a_1099_447# a_306_277# a_1229_531# VPB sky130_fd_pr__pfet_01v8_hvt w=420000u l=150000u
X8 a_1275_125# a_1287_276# VGND VNB sky130_fd_pr__nfet_01v8 w=420000u l=150000u
X9 VPWR a_1832_367# Q VPB sky130_fd_pr__pfet_01v8_hvt w=1.26e+06u l=150000u
X10 a_294_35# a_306_277# VPWR VPB sky130_fd_pr__pfet_01v8_hvt w=640000u l=150000u
X11 VPWR a_336_463# a_501_229# VPB sky130_fd_pr__pfet_01v8_hvt w=840000u l=150000u
X12 a_438_123# a_501_229# a_540_123# VNB sky130_fd_pr__nfet_01v8 w=420000u l=150000u
X13 a_1832_367# a_1099_447# VPWR VPB sky130_fd_pr__pfet_01v8_hvt w=640000u l=150000u
X14 a_27_463# RESET_B VPWR VPB sky130_fd_pr__pfet_01v8_hvt w=420000u l=150000u
X15 VPWR D a_27_463# VPB sky130_fd_pr__pfet_01v8_hvt w=420000u l=150000u
X16 VPWR RESET_B a_1287_276# VPB sky130_fd_pr__pfet_01v8_hvt w=420000u l=150000u
X17 a_1099_447# a_294_35# a_1275_125# VNB sky130_fd_pr__nfet_01v8 w=420000u l=150000u
X18 a_1287_276# a_1099_447# VPWR VPB sky130_fd_pr__pfet_01v8_hvt w=420000u l=150000u
X19 a_142_121# D a_27_463# VNB sky130_fd_pr__nfet_01v8 w=420000u l=150000u
X20 VGND a_336_463# a_501_229# VNB sky130_fd_pr__nfet_01v8 w=640000u l=150000u
X21 a_501_229# a_306_277# a_1099_447# VNB sky130_fd_pr__nfet_01v8 w=640000u l=150000u
X22 a_27_463# a_294_35# a_336_463# VNB sky130_fd_pr__nfet_01v8 w=420000u l=150000u
X23 a_306_277# CLK_N VGND VNB sky130_fd_pr__nfet_01v8 w=420000u l=150000u
X24 a_1229_531# a_1287_276# VPWR VPB sky130_fd_pr__pfet_01v8_hvt w=420000u l=150000u
X25 VPWR RESET_B a_336_463# VPB sky130_fd_pr__pfet_01v8_hvt w=420000u l=150000u
X26 a_336_463# a_306_277# a_438_123# VNB sky130_fd_pr__nfet_01v8 w=420000u l=150000u
X27 a_1465_125# a_1099_447# a_1287_276# VNB sky130_fd_pr__nfet_01v8 w=420000u l=150000u
X28 a_447_463# a_501_229# VPWR VPB sky130_fd_pr__pfet_01v8_hvt w=420000u l=150000u
X29 a_501_229# a_294_35# a_1099_447# VPB sky130_fd_pr__pfet_01v8_hvt w=840000u l=150000u
X30 a_1832_367# a_1099_447# VGND VNB sky130_fd_pr__nfet_01v8 w=420000u l=150000u
X31 VGND a_1832_367# Q VNB sky130_fd_pr__nfet_01v8 w=840000u l=150000u
.ends