NAME

inputiso0n from sky130_fd_sc_hdll

DESCRIPTION

Input isolator with inverted enable.

FUNCTION

X = (A & SLEEP_B)

VERILOG

"sky130_fd_sc_hdll__inputiso0n" 
/*
*/


`ifndef SKY130_FD_SC_HDLL__INPUTISO0N_FUNCTIONAL_V
`define SKY130_FD_SC_HDLL__INPUTISO0N_FUNCTIONAL_V

/**

`timescale 1ns / 1ps
`default_nettype none

`celldefine
module sky130_fd_sc_hdll__inputiso0n (
    X      ,
    A      ,
    SLEEP_B
);

    // Module ports
    output X      ;
    input  A      ;
    input  SLEEP_B;

    //  Name  Output  Other arguments
    and and0 (X     , A, SLEEP_B     );

endmodule
`endcelldefine

`default_nettype wire
`endif  // SKY130_FD_SC_HDLL__INPUTISO0N_FUNCTIONAL_V

SPICE

LAYOUT

sky130_fd_sc_hdll__inputiso0n_1

not to scale 



.subckt sky130_fd_sc_hdll__inputiso0n_1 A SLEEP_B VGND VNB VPB VPWR X
X0 VGND a_27_75# X VNB sky130_fd_pr__nfet_01v8 w=650000u l=150000u
X1 VPWR A a_27_75# VPB sky130_fd_pr__pfet_01v8_hvt w=420000u l=180000u
X2 a_27_75# A a_123_75# VNB sky130_fd_pr__nfet_01v8 w=420000u l=150000u
X3 a_123_75# SLEEP_B VGND VNB sky130_fd_pr__nfet_01v8 w=420000u l=150000u
X4 VPWR a_27_75# X VPB sky130_fd_pr__pfet_01v8_hvt w=1e+06u l=180000u
X5 a_27_75# SLEEP_B VPWR VPB sky130_fd_pr__pfet_01v8_hvt w=420000u l=180000u
.ends